Transformer arrangement for an analogue computer and other uses



I 3,441,726 TRANSFORMER ARRANGEMENT FOR AN ANALOGUE COMPUTER AND OTHER-USES. Filed Oct. 15, 1965 April 29, 1969 HONORE L,

Sheet of3 F/GJ FIG. 3

April 29, 1969 HQNQRE ETAL 3,441,726

TRANSFQRMER ARRANGEMENT FOR AN ANALOGUE COMPUTER AND OTHER USES Filed Oct. 15,1965 Sheet 3 of s April 29, 1969 E. HONORE ET AL R 3,441,726

TRANSFORMER ARRANGEMENT FOR AN ANALOGUE COMPUTER AND OTHER USES Filed Obt. 15, 1965 I Sheet 3 of 3 v United States Patent Int. (:1. (506 7/02 US. Cl. 235-193 13 Claims ABSTRACT OF THE DISCLOSURE A transformer circuit comprises a set of interconnected inductors and capacitors, tuned to an operating frequency. The transformation ratio is adjusted to a desired value by electrical control means controlling the capacitance values of the capacitors.

The present invention relates to computer circuits of the general type described for example in the United States Patent 2,785,853 or in the French Patent 1,185,378, issued on applications filed by the applicants. These patents relates to computer circuits consisting of passive, non-dissipative elements (inductances and capacitances). Such circuits comprise assemblies of impedance or admittance elements which can vary together about the same mean value in such a way that if the impedances or admittances of some of them rise by a certain amount, those of others decline by an amount which, for the operating frequency, is equal in absolute value to the first amount, whilst on the other hand, if the input or output terminals are short-circuited, the short circuit impedance of the circuit is infinite.

The fact that the values of the elements are varied together about the same mean value means that, for obtaining practical and economical solutions, it is highly desirable, if not necessary, to use elements whose impedance or admittance varies linearly as a function of a control parameter, a mechanical or electrical magnitude.

This requirement restricts considerably the choice of the control parameter.

It is an Object of this invention to provide a computer circuit wherein the choice of the control parameters is much wider.

For a better understanding of the invention and to show how the same may be carried into effect reference will be made to the drawing accompanying the following description and wherein,

FIG. 1 is a diagram of a circuit according to the invention;

FIG. 2 is the equivalent diagram of the circuit of FIG. 1;

FIG. 3 is the diagram of an adding circuit according to the invention;

FIG. 4 is another embodiment of the arrangement of FIG. 1;

FIG. 5 is an embodiment of a tripole according to the invention;

FIG. 6 and FIG. '7 are explanatory diagrams;

FIG. 8 is an equivalent diagram of the tripole of FIG. 5; and

FIG. 9 is an embodiment of the tripole of FIG. 8.

In the following description, the admittances of the various elements are considered. It will be shown further below that the same considerations apply if impedances are considered.

3,441,726 Patented Apr. 29, 1969 The circuit of FIG. 1 comprises a variable admittance network AV, mounted in lattice as shown between the terminals N, N and P, P.

The values of these admittances are equal in pairs as shown in the drawing to the values A and A, for the operating frequency f. Hereinafter the letters indicating the value of these admittances will be for simplicity used as reference letters for the admittance elements.

The admittance elements A are mounted, respectively, between terminals N and P, N and P, and the admittance elements A between terminals N and P and N and P, respectively.

The circuit of FIG. 1 is completed by two networks of fixed elements whose admittances for the working frequency 1 have the values shown in FIG. 1, namely a, b, c, for the network AF, and u, 13, "y for the network AF A symmetrical input voltage (+U, U) is applied to the input terminals E, E. A symmetrical output voltage (+V, V) is collected from the output terminals S, S.

The intensities at the input terminals E and E are i and i respectively; the intensities at the output terminals S and S are i and j' respectively. According to the invenvention, the values of the admittances A, A, a, b, c, a, ,8, and 'y are so chosen that:

(a) If the output SS is in open circuit (i=0), the admittance of the input of the quadripole, is zero;

(b) If the input EE is short-circuited (U=0), its output impedance is zero, whatever may be the values of A and of A.

The circuit of FIG. 1 is formed only from passive e-le' ments; its equivalent diagram is shown in FIG. 2.

It comprises a perfect transformer T with a variable transformation ratio p whose primary winding is connected to the terminals EE. An admittance element L is mounted in parallel to E and E. An impedance L is mounted in series between the secondary winding and the terminal S, and the other end of the secondary winding is connected directly to the terminal S.

The equation of the quadripole of FIG. 2 may be written as follows:

Condition (a) is written L =O (Equation 1),

Condition (b) is written L =0 (Equation 2).

In other words, the quadripole according to the invention is equivalent to a perfect transformer.

A study of the operation of the quadripole of FIG. 1 leads, for the voltages and intensities appearing at different points, to the Equations 3 to 10.

In these equations u u are the voltages appearing at the points M and Q, respectively, i and i; are the intensities between the points M and N on the one hand, and P and Q on the other hand.

One has at the input:

Elimination of a a i i leads to the following two relations:

(A+AK)(KK)-(AA)(K-K)%=O (12) For the quadripole of FIG. 1 to be a perfect transformer, it is necessary and sufiicient that the ratios U/ V and j/i should be equal.

In the description, the values of the circuit elements have been expressed in terms of admittances in the calculation. It is equally possible to use impedance values.

Relation (3) can be written:

Substituting K ZZK (Z+Z')+K which is obviously equivalent to:

The described quadripole is reversible and can be used in assemblies such as those described in the above mentioned patent.

FIG. 3 shows, by way for example, a circuit which receives at two pairs of input terminals alternating voltages U and U and supplies an alternating voltage U across the output terminals, voltage V having the same frequency and the same phase as voltages V and V and wherein the three voltages are linked by the relation:

The assembly shown in FIG. 3 comprises:

(a) Three circuits as shown in FIGURE 1, designated, respectively, by p p and p p p and p being the respective transformation ratios of these circuits;

(b) Three quadripoles K, whose input terminals are connected, respectively, to the output terminals of quadripoles p p and p and Whose output terminals are interconnected as shown in the drawing to terminals B and B.

The quadripoles K are reversible voltage-to-current transformer tuned to the operating frequency, such as for example those described in the above-mentioned patent and shown for example in FIG. 4 thereof.

Let U U and U be the voltages across the free terminals of circuits p p and p3 and V V and V the voltages across the output terminals of circuits p p p One may write:

The application of these voltages to one pair of terminals of the quadripoles K causes the appearance of the following intensities at their respective outputs:

It follows from the application of Kirchhoffs law at the point B that:

In view of the reversibility of the assembly of quadripoles, if, for example, the voltages U and U are imposed, the voltage U appearing at the free terminals of the quadripole p will satisfy the relation (16) which can also be written as follows:

The circuit of FIG. 3 is therefore an adding circuit.

It should be noted that the circuit according to the invention forms by itself a perfect voltage-to-voltage or current-to-current transformer.

The values a, b, c, a, B, and 'y are determined as a function of K and K by relations (9) and (10). There remain therefore two degrees of freedom which may be used for facilitating the implementation of the invention.

Since the ratio p is expressed by it varies with A and A. In practice, variations of A and A may be determined by a control value, for example, a voltage.

For example this value may change linearly as a function of a variable x which varies itself between +1 and 1. A, A and p are the functions A(x), A(x) and (x) of x.

It may also be desired that for x=0, (x)=0, from which it follows that A(0)=A(0) =A and that for x=1, p=1 and for x=1, p=1.

For satisfying these two conditions, it is sufficient, without being necessary, however, that:

It also follows that one must have G E-WK In practice, it is convenient to use the same element for A and A, and if x characterizes the control value applied at A, the control value to be applied to A must be x, 1.e.,

It is obvious that this arrangement meets the conditions outlined above, with the only proviso that f(0)=l.

Since, in practice, physical phenomena control the variations of elements A and A, it is abvious that the values of A and A cannot follow rigorously, as a function of x, the law defined by expression (13). The problem is then of selecting the values of the constants K and K so that this law is followed with the least possible deviation whatever may be the value of x varying between -1 and +1.

This deviation may be defined as K and K should be chosen, for example, so that the function E(x) is a function of the highest possible order of x near x-=0.

The functions A(x) and A'(x) can always be represented by series extensions near x=0:

The above conditions consists in taking E(x)=0 for x=0 and, in the expression for E(x) the term x being zero, to select K and K so that the term in x of E(x) is zero.

The condition that E(x) =0 for x=0 leads to K=2A In the conditions X12 2 n 2 E'(w) (i2 A +K x For eliminating the term in x A 1 K 2A 1-- E(x) is thus a value in x wherein the term in x is zero by the definition of E(x).

The appearance of this deviation value has the consequence that the admittance L and the impedance L in FIG. 2 are no longer zero. It follows from a simple calculation:

As with E (x), these functions of x have as first variable term a term in X FIG. 4 shows one embodiment of the circuit according to the invention.

The elements a and b of FIG. 1 are here, respectively, a capacitance C and an inductance L The elements 0 are two capacitors C and C The element B has been omitted.

The elements a and 'y are inductances with values L and L respectively.

The admittances A and A are diodes 1, 2, 1, 2' of the Varicap type, forming electrically controlled variable capacitances.

The assembly AF formed by the capacitance C the capacitances C C and the inductance L is connected to the terminals of the primary of a transformer T with the transformation ratio 1, having two secondaries 11 and 12 with centre points grounded through two D.C. sources +V and --V respectively. The terminals of the secondary 11 are connected to Varicaps 1 and 1', those of 12 to Varicaps 2 and 2.

Varicaps 1 and 2 have their free terminals interconnected and applied to the inductance similarly 1 and 2 have their free terminals interconnected and applied to the inductance L The inductances L L L form the assembly AF of FIG. 1.

The variable control voltage u is applied between ground and the centre point of the inductance L The assembly operates as follows:

The value of the capacitance C of a silicon junction diode or Varicap may be represented by the term u m In the embodiment considered, V is of the order of 7 volt and u may vary between 6 v. and +6 v. If x=l and u=6 v., A is of the order of 6.8.

The diagram of FIG. 4 is a particular case of FIG. 1, and if:

A =jC w where w=21rf, it follows that As indicated above, A and A may be represented by the following limited developments:

It follows:

and

In the preceding, there have been described symmetrical assemblies, wherein the circuit assembly is such that each point to which is applied a voltage U or at which flows a current i corresponds to another point to which is applied a voltage U and where flows a current i.

The invention also applies to networks with a nonsymmetrical structure.

FIG. 5 shows a tripole, i.e., a quadripole with two terminals grounded, according to the invention.

The circuit comprises three assemblies A1 AV and AF Assemblies AF and AF are tripoles, each with one terminal grounded. Assembly AV is a symmetrical quadripole having a lattice of variable admittances equal in pairs to the values 2A and 2A, respectively. Assemblies AF and AV, A1 and AV are respectively coupled by two transformers T and T with the ratio 1. The primary of T and the secondary of T have one terminal earthed.

2a, 2b and c are the values of the admittances 20, 25 and 'y are the values of the admittances of AF U and i are the input voltages and currents.

V and j are the output voltages and currents.

It may be shown that, if A, A, a, b, c, a, ,8, 7 have the same values as in FIG. 1, the same equations will be obtained.

This assembly forms a tripole with one terminal grounded. It is equivalent to the tripoles described in the French Patent No. 1,154,263 of June 22, 1956, and No. 1,185,378 of Jan. 31, 1957, filed by the same applicants.

It may be shown that the quadripole AV in FIG. 5, shown separately in FIG. 6, is equivalent to the tripole in FIG. 7. In this latter tripole, the admittances are A and A and the transformers T and T have the trans- "formations of 2 and 1, respectively. If I and U, I and V are input and output voltages and currents, it may be written:

The Equations 21 and 22 are obviously identical.

The diagram of the tripole according to the invention may therefore be constructed according to FIG. 8.

The diagram differs from that of FIG. 5, in that the elements AF and AF are connected through an autoinductor M the centre point of which is grounded and the elements AF and AV are connected directly.

The admittance values are always as shown hereinbefore.

FIG. 9 is an embodiment in which the inductance M has been replaced by a transformer T with two secondaries. The admittances A and A are formed by two Varicaps 1 and 2, one polarized by a voltage V the other by a voltage -V whilst the control voltage u is applied between L and earth.

Of course the invention is not limited to the embodiments described and shown which are given solely by way of example.

What is claimed is:

1. A computer and transformer circuit for operating at a predetermined frequency comprising: a pair of input terminals; a pair of output terminals; a first and a second pair of intermediary terminals; at least a first pair of variable impedances having respective values A and A at said frequency, respectively coupled to one of said second intermediary terminals and to said first pairs of intermediary terminals; a first and a second set of fixed impedances interconnecting said pair of input terminals and said first pair of intermediary terminals, said pair of output terminals, and to said second pair of intermediary terminals; A and A being linked by the equation (A+A'-K) (A+AK')=(AA) wherein K and K are constant, said circuit having an input admittance which is zero, with the output terminals open and zero output impedance with its input terminals short-circuited, at the operating frequency.

2. A circuit as claimed in claim 1 further comprising a second pair of variable impedances, having values A and A and respectively COupled to said other second intermediary terminals and to said first pair of intermediary terminals.

3. A circuit according to claim 2, wherein said first set of fixed impedances comprises a first pair of impedances of equal value for connecting respectively each input terminal to each first intermediary terminal, a first and second impedance for connecting respectively one input terminal to the other, one first intermediary terminal to the other, a second pair of impedances of equal values for connecting respectively each second intermediary terminal to each output terminal, a third and a fourth impedance for connecting respectively one output 8 terminal to the other, one second intermediary terminal to the other.

4. A circuit according to claim 3, further comprising electrical means for varying the values A and A.

5. A circuit as claimed in claim 4 wherein said variable impedances are respectively diodes forming electrically controllable variable capacitances and having D.C. control inputs respectively for controlling their impedance values.

6. A circuit as claimed in claim 5 further comprising transformer means having a primary connected between said first intermediary terminals, and a first and a second identical to each other, having respectively a first and a second midpoints and free terminals, first and second diodes being respectively connected between said free terminal of said first secondary, and a first and a second of said second intermediary terminals; third and fourth diodes being respectively connected between said free terminals of said second secondary and the second and the first intermediary terminals; a first and a second D.C. source being connected respectively between said midpoints of said first and said second secondary and the ground, said first and said second source applying respective voltages equal in absolute values, but of inverse polarities.

7. A circuit according to claim 6 wherein said second set of fixed impedances comprises an inductance connected between said output terminals, said inductance having a midpoint, an adjustable D.C. source being connected between said midpoint of said impedance and the ground.

8. A circuit as claimed in claim 1 wherein one of said input terminals, one of the first intermediary terminals, one of the second intermediary terminals, and one of the output terminals are grounded.

9. A circuit as claimed in claim 8, wherein said first set of fixed impedances comprises a lattice connecting the other input terminal and the other first intermediary to the ground, said second set of fixed impedances comprises a second lattice connecting the other second intermediary terminal, the other output terminals and the ground.

10. A circuit as claimed in claim 9 comprising a first variable impedance of value A and a second variable impedance of value A.

11. A circuit as claimed in claim 10 wherein said variable impedances are respectively diodes forming electrically variable capacitances having DC control inputs respectively for controlling their impedance values.

12. A circuit as claimed in claim 11 further comprising a transformer having a primary connected between said other first intermediary terminal and the ground and a first and second secondary having respectively first terminals connected to said diodes, and second terminals; a first and a second D.C. source, applying voltages of equal values but of opposite sign, being connected between said second terminals of said first and second secondaries respectively and the ground.

13. A circuit according to claim 12 wherein said second set of fixed impedances comprises an inductance connected to said other output terminal, and an adjustable D.C. source connecting said inductance to the ground.

References Cited UNITED STATES PATENTS 6/1963 Keizer 32376 X 4/1964 Manteuffel 32376 X U.S. Cl. X.R. 235184 

